In recent years, with progresses of digital technologies of electronic devices, development of memory devices which have higher capacities and are non-volatile have been made vigorously, to store data of music, images, information, and so on. For example, a non-volatile memory device incorporating ferroelectric as capacitive elements has already been practiced in many fields. In addition to the non-volatile memory device incorporating the ferroelectric as the capacitive elements, an attention has been paid to a non-volatile memory device (hereinafter referred to as ReRAM “Resistive RAM”) incorporating a material which changes its resistance value in response to an electric pulse applied and preserves the changed state, because of high compatibility with normal semiconductor process steps.
Patent Literature 1 discloses a cross-point ReRAM including variable resistance layers formed inside of miniaturized holes arranged in matrix, respectively, to realize a smaller-size of memory elements and a higher capacity of a memory device.
As a process for filling layers into the miniaturized holes, an atomic layer deposition (ALD) method has been developed. A process for forming a metal oxide by the ALD method includes:
1) vaporizing a precursor material to provide a source gas containing metal atoms;
2) introducing the source gas into a vacuum chamber in which a substrate is placed, to form a metal mono-atomic layer on the substrate,
3) then introducing a purge gas to purge an unnecessary portion of the source gas,
4) then introducing a reactive gas such as O2, O3, or H2O, to oxidize the metal mono-atomic layer and to remove ligand of metal,
5) finally introducing a purge gas to purge an unnecessary portion of the reactive gas, and forming a metal oxide layer, and
6) repeating a cycle consisting of the step 2) to the step 5), to form a metal oxide layer with a desired thickness.
The ALD method has a feature that a layer can be conformally grown into a miniaturized hole with a high aspect ratio, because the layer is grown for each mono-atomic layer.
Non-patent Literature 1 describes that the ALD method has been studied and developed as a process for a nano-device by utilizing the above feature.
Non-patent Literatures 2 and 3 report that a TiO2 layer and a HfO2 deposited by the ALD method exhibits a resistance changing phenomenon in response to electric pulses.
Patent Literature 2 discloses a variable resistance non-volatile memory element incorporating a NIO layer deposited by the ALD method which is able to form a layer which is thin, less in defective, and dense, which memory element is intended to reduce a leak current and improve a resistance changing characteristic.
Patent Literature 3 discloses a variable resistance element including two variable resistance layers which are different in oxygen content from each other.